The invention relates generally to semiconductor device fabrication and, more specifically, to methods for fabricating wiring structures and inductors during back-end-of-line (BEOL) processing, BEOL wiring structures and inductors, and design structures for BEOL wiring structures and inductors formed from the wiring of a BEOL wiring structure.
On-chip inductors are passive devices commonly utilized in monolithic integrated circuits designed to operate at high frequencies, such as those found in wireless communication devices. In particular, on-chip inductors may be utilized in radiofrequency integrated circuits (RFICs), which are found in applications such as Phase-Locked Loop (PLL) transmitters, voltage controlled oscillators (VCOs), impedance matching networks, filters, etc.
On-chip inductors may be integrated into one or more of the metallization levels of a BEOL wiring structure. Because BEOL wiring structures are routinely employed in chip fabrication to form the metal interconnect structures for integrated circuits, on-chip inductors may be formed with standard semiconductor processing steps without introducing additional processing steps or additional masks. In particular, a BEOL wiring structure is commonly fabricated using damascene processes in which vias and trenches in various dielectric layers are filled with metal to create multi-level, high-density interconnections with device structures in the integrated circuit. An on-chip inductor may be formed as a group of metal wires within a metallization level of the BEOL wiring structure.
An inductor has a winding resistance from the metal wires forming the coils, which appears in the circuit as a resistance in series with the inductor. The inductor's resistance converts electric current through the coils into heat, which is source of the energy loss. The quality factor Q represents a ratio of inductive reactance to resistance at a given frequency, and is a metric reflecting inductor efficiency. As its Q factor increases, the inductor approaches the behavior of an ideal, lossless inductor.
Improved methods are needed for fabricating BEOL wiring structures and on-chip inductors, as well as improved BEOL wiring structures and on-chip inductors and improved design structures for a BEOL wiring structure or on-chip inductor.